The present invention relates to a regulator circuit enabling efficient acquisition of a desired voltage.
A regulator is used in a semiconductor device to acquire the desired voltage. In such a case, trimming may be performed to acquire the optimal output voltage (for example, refer to Japanese Laid-Open Patent Publication No. 2004-146548, page 1). The semiconductor device described in Japanese Laid-Open Patent Publication No. 2004-146548 includes an oscillation circuit and a voltage regulator, which is a constant voltage power supply enabling adjustment of the output voltage. During adjustment of the regulator's output voltage, a first power ON clear unit outputs a signal, which is determined by a time constant, when the regulator is activated. Further, a second power ON clear unit outputs a signal from when the regulator is activated to when adjustment of the output voltage ends. A reference voltage generation circuit generates a reference voltage based on the outputs of the power ON clear units. A voltage comparison circuit compares the output of the reference voltage generation circuit with the output of the regulator. The semiconductor device includes a counter for counting clock outputs of a clock control circuit. A decoder decodes the output of the counter and adjusts the output of the regulator.
The semiconductor device described in Japanese Laid-Open Patent Publication No. 2004-146548 requires accurate trimming to be performed for the output of a target voltage. More specifically, accurate calculations that take circuit resistance into account must be performed. When the calculations are inaccurate, the target voltage cannot be accurately acquired.
Japanese Laid-Open Patent Publication 5-11872 (page 1) describes a technique that would require scale enlargement or an increase in feedback resistance for accurate acquisition of the reference voltage. This may result in the circuit configuration being large or complicated. Further, the offset produced by a voltage comparison circuit may offset the output voltage.
Also, in this circuit configuration, a power reduction in the power supply that drives the regulator would erase the output setting of the counter. Thus, readjustments must be performed whenever a power reduction occurs.
Additionally, the adjustable voltage range is restricted by voltages (VDD, VSS) that are used to generate the reference voltage. Therefore, there is not much freedom for voltage setting.